IEEE Journal of Solid-State Circuits · 1974 · 52 citations · 19 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignCmos Circuit DesignDelay ModelingIntegrated Circuit DesignLow-power Digital Circuit DesignTiming AnalysisVery-large-scale Integration LayoutCmos Digital Circuit DesignCmos Logic CircuitsCmos Logic DesignHigh-speed Cmos DesignHigh-speed Logic DesignLogic Gate DelayVery-large-scale Integration (Vlsi) DesignVlsi Implementation
VMOS is a new v-groove n-channel MOS logic structure well suited for 5-V high-speed random logic. Compared to a typical gold-doped TTL medium-scale integrated (MSI) circuit, an experimental pin for pin equivalent VMOS circuit is 20 percent faster, four times smaller in area, and six times lower in power dissipation. On-chip VMOS delays are in the 2-3 ns range; off-chip drive capability exceeds 50 MHz with 6 TTL unit loads.
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The physics of semiconductor devices
R. H. Rediker · Solid-State Electronics · 1970 · 1.6K citations
Anisotropic Etching of Silicon
D. B. Lee · Journal of Applied Physics · 1969 · 307 citations