VMOS: high speed TTL compatible MOS logic

T.J. Rodgers, J.D. Meindl

IEEE Journal of Solid-State Circuits · 1974 · 52 citations · 19 references

Concepts

Abstract

VMOS is a new v-groove n-channel MOS logic structure well suited for 5-V high-speed random logic. Compared to a typical gold-doped TTL medium-scale integrated (MSI) circuit, an experimental pin for pin equivalent VMOS circuit is 20 percent faster, four times smaller in area, and six times lower in power dissipation. On-chip VMOS delays are in the 2-3 ns range; off-chip drive capability exceeds 50 MHz with 6 TTL unit loads.

References

19