Merged-transistor logic (MTL)-a low-cost bipolar logic concept

Abstract

The authors describe a novel bipolar logic featuring a direct injection of minority carriers into the switching transistor. MTL is based on inverters having decoupled multicollector outputs for the logical combinations. The devices are self-isolated and no ohmic load resistors are required. This is a key to monolithic logic chips of very high functional density and low power dissipation. On experimental chips an excellent power-delay product of 0.35 pJ has been measured. These experiments show that a density of 100 gates/mm/SUP 2/ can be achieved with present manufacturing tolerances (minimum dimensions: 0.3-mil metal line width, 0.15-mil spacing, 0.2/spl times/0.2-mil/SUP 2/ contact holes).