DIBL coefficient in short-channel NMOS transistors

Abstract

A study of the drain induced barrier lowering (DIBL) effect in short-channel NMOS transistors is presented. The study is based on the two dimensional analytical solution of Poisson equation in the depletion region under the gate. A closed form analytical expression for the DIBL coefficient is derived and its temperature dependence is investigated. The numerical results obtained are in close agreement with the experimental data. The derived expression could be efficiently used in circuit simulation programs.