Publication | Closed Access
Reliability Studies of a Through Via Silicon Stacked Module for 3D Microsystem Packaging
27
Citations
3
References
2006
Year
Unknown Venue
EngineeringMicrosystem PackagingMechanical EngineeringReliability EngineeringAdvanced Packaging (Semiconductors)Reliability StudiesElectronic PackagingReliabilityFlipchip DieElectrical Engineering3D Ic ArchitectureHardware ReliabilityDrop TestChip AttachmentDrop Impact TestDevice ReliabilityMicroelectronics3D PrintingPhysic Of FailureChip-scale PackageMicrofabricationCircuit Reliability
In this study, two types of reliability tests are studied for silicon stacked module. One is for temperature cycle solder joint reliability. Another is for drop impact test. Test vehicles are fabricated using silicon fabrication processes such as SiO/sub 2/ deposition, metal deposition, lithography, through via formation, copper plating and dry or wet etching. After flipchip die and silicon substrate fabrication, they are assembled by flipchip bonder. Daisy chains are formed between flipchip dies and each silicon substrates and resistance measurement is carried out with temperature cycle test (-40/125/spl deg/C, 2cycles/hr). In case of drop test, the JESD recommended condition B (e.g. 1500 G, 0.5 millisecond duration, and half-sine pulse) is adopted. And in-situ monitoring is carried out to observe the failure during the drop test. Reliability results of through via silicon stacked module indicated that it passed 1000 cycles T/C and survived drop impact test.
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