A.G.K. Viswanath - Concepedia

Author

A.G.K. Viswanath

Institute of High Performance Computing

Also Known As

A. Viswanath, A.G.K. Viswanath, Akella G. K. Viswanath, Akella G.K. Viswanath

Publications

174

Citations

H-Index

Concepts

All Affiliations

Institute of High Performance Computing Institute of Microelectronics

About

A.G.K. Viswanath is an author at Institute of High Performance Computing specializing in engineering, electronic packaging, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	7	7	158
2	Electrical Engineering	5	5	111
3	Applied Physics	2	2	40
4	Computer Engineering	2	2	40
5	Materials Engineering	1	1	30

A.G.K. Viswanath

Publications

158

Citations

H-Index

Page 1

	Year	Citations
Reliability of a Silicon Stacked Module for 3-D SiP Microsystem Seung Wook Yoon, SoonThor Lim, A.G.K. Viswanath, IEEE Transactions on Advanced Packaging Flip Chip3D Ic ArchitectureElectrical EngineeringChip-scale PackageEngineering	2008	34
Numerical Study of Gold Wire Bonding Process on Cu/Low-k Structures A.G.K. Viswanath, Xiaowu Zhang, V.P. Ganesh IEEE Transactions on Advanced Packaging EngineeringSevere Plastic DeformationMechanical EngineeringInterconnect (Integrated Circuits)Numerical Study	2007	30
Reliability Studies of a Through Via Silicon Stacked Module for 3D Microsystem Packaging Seung Wook Yoon, D. Witarsa, S. Yak, EngineeringMicrosystem PackagingMechanical EngineeringReliability EngineeringAdvanced Packaging (Semiconductors)	2006	27
Development of 3-D Stack Package Using Silicon Interposer for High-Power Application Navas Khan, Seung Wook Yoon, A.G.K. Viswanath, IEEE Transactions on Advanced Packaging EngineeringComputer ArchitectureAdvanced Packaging (Semiconductors)Electronic Packaging3D Ic Architecture	2008	24
Numerical Analysis by 3D Finite Element Wire Bond Simulation on Cu/Low-K Structures A.G.K. Viswanath, Fang Wang, Xiaowu Zhang, Numerical AnalysisEngineeringSevere Plastic DeformationMechanical EngineeringMaterial Simulation	2006	17
Development of 3D Stack Package Using Silicon Interposer for High Power Application Navas Khan, Seung Wook Yoon, A.G.K. Viswanath, EngineeringComputer ArchitectureAdvanced Packaging (Semiconductors)Heat DissipationElectronic Packaging	2006	16
PEDL (Polymer Encapsulated Dicing Line) Technology for Copper/Low-k Dielectrics Interconnect Seung Wook Yoon, D. Wirtasa, Sharon Pei-Siang Lim, EngineeringIntegrated CircuitsInterconnect (Integrated Circuits)Low-k MaterialsConducting Polymer	2006	10

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