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Ultrathin Channel Vertical DG MOSFET Fabricated by Using Ion-Bombardment-Retarded Etching
55
Citations
23
References
2004
Year
Materials EngineeringElectrical EngineeringIon ImplantationEngineeringUltrathin ChannelChannel ThicknessMicrofabricationNanoelectronicsElectronic EngineeringApplied PhysicsVertical Type Double-gateIon-bombardment-retarded EtchingSemiconductor Device FabricationSilicon On InsulatorMicroelectronicsPlasma EtchingSemiconductor Device
A vertical ultrathin channel formation process for a vertical type double-gate (DG) MOSFET is proposed. Si wet etching using an alkaline solution has newly been found to be significantly retarded by introducing ion bombardment damage. We have also found that the ion-bombardment-retarded etching (IBRE) is independent of ion species and the implanted impurities can easily be transferred to be the dopants for source and drain regions of MOSFETs. By utilizing the IBRE, vertical type DG MOSFETs with a 12-nm-thick vertical channel were fabricated successfully. The fabricated vertical DG MOSFETs clearly exhibit the unique advantage of DG MOSFETs, i.e., high improvement of short-channel effect immunity by reducing the channel thickness. Thanks to the ultrathin channel, very low subthreshold slopes of 69.8 mV/dec. for a p-channel and 71.6 mV/dec for an n-channel vertical DG MOSFET are successfully achieved with the gate length of 100 nm.
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