Advanced GaAs-MMIC process technology using high-dielectric constant thin film capacitors by low-temperature RF sputtering method

Abstract

The authors have developed a new GaAs-MMIC process technology using the low-temperature RF sputtered SrTiO/sub 3/ thin film capacitors which were combined with WSi-gate self-aligned FETs (SAFETs). The SrTiO/sub 3/ film with high dielectric constant (/spl epsi//sub r/) over 100 and low leakage current density under 10/sup -6/A/cm/sup 2/ at 1 MV/cm was obtained by RF sputtering method with the temperature range of 200/spl sim/300/spl deg/C. This SrTiO/sub 3/ capacitor exhibited no /spl epsi///sub r/ change up to 3.0 GHz, and low insertion losses of 0.29 dB and 0.05 dB were obtained for 32 pF-capacitor (S=10,000 /spl mu/m/sup 2/) at 0.2 GHz and 1.0 GHz, respectively. By integrating these on-chip SrTiO/sub 3/ bypass-capacitors into GaAs-IC, the parasitic inductance of the source-to-ground interconnection is successfully reduced, and the enhanced gain characteristic was obtained for self-biased amplifier circuit.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>