Microelectronics Journal · 2010 · 57 citations · 43 references
EngineeringComputer EngineeringComputer ScienceDesign AutomationMicroelectronicsSystem-on-chip DesignBuilt-in Self-testDesign For TestabilityIntegrated Circuit DesignInterconnect DesignPhysical DesignVery-large-scale Integration LayoutElectrical TestabilityInteger Linear ProgrammingInterconnect OptimizationLinear Integer OptimizationTechnology ScalingTest Access Mechanism DesignTest OptimizationThrough-silicon Vias
43
Demystifying 3D ICs: The Pros and Cons of Going Vertical
W. Rhett Davis, John Wilson, Stephen Mick et al. · IEEE Design & Test of Computers · 2005 · 832 citations
Engineering, Computer Engineering, Electrical Engineering +17
A thermal-driven floorplanning algorithm for 3D ICs
A structured and scalable mechanism for test access to embedded reusable cores
Erik Jan Marinissen, R. Arendsen, G. G. J. Bos et al. · 2002 · 344 citations