Temperature Dependence of CMOS Device Reliability

Abstract

This paper presents experimental results on the temperature dependence of CMOS device reliability in topological scaling. The latch-up characteristics as functions of temperature, substrate material, and device geometry are reported based on a twin-tub CMOS technology. The trade-off between the advantage of a higher device transconductance in scaled CMOSFET's and the associated reliability constraints due to the hot-carrier-induced device degradation is studied in a wide temperature range. The n-channel LDD MOSFET lifetime is observed to follow t = (A/Id) (Isub/Id)-2.7 from room temperature to 77 K, where A is a temperature-dependent coefficient with an activation energy of 39 mev. The temperature dependence of the generation of the oxide charge is described. A correlation between the positive charge generated at high injection level and the oxide breakdown is identified.