IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2003 · 100 citations · 10 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsPower ElectronicsVlsi DesignCmos Circuit DesignDigital Integrated Circuit DesignHigh-frequency Power ConversionIntegrated Circuit DesignIntegrated Circuit DevicesMixed-signal Integrated Circuit DesignBuck ConvertersCurrent-to-voltage ConversionHigh-efficiency ConverterHigh-efficiency Converter DesignIntegrated Passive DevicesMonolithic ArchitectureParasitic Element ModelingVoltage-to-current Conversion
An analysis of an on-chip buck converter is presented in this paper. A high switching frequency is the key design parameter that simultaneously permits monolithic integration and high efficiency. A model of the parasitic impedances of a buck converter is developed. With this model, a design space is determined that allows integration of active and passive devices on the same die for a target technology. An efficiency of 88.4% at a switching frequency of 477 MHz is demonstrated for a voltage conversion from 1.2-0.9 volts while supplying 9.5 A average current. The area occupied by the buck converter is 12.6 mm/sup 2/ assuming an 80-nm CMOS technology. An estimate of the efficiency is shown to be within 2.4% of simulation at the target design point. Full integration of a high-efficiency buck converter on the same die with a dual-V/sub DD/ microprocessor is demonstrated to be feasible.
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High-performance microprocessor design
P.E. Gronowski, William J. Bowhill, R.P. Preston et al. · IEEE Journal of Solid-State Circuits · 1998 · 308 citations
Engineering, Computer Engineering, Electrical Engineering +15