IEEE Transactions on Electron Devices · 1994 · 55 citations · 19 references
Device ModelingTransconductance VariationsElectrical EngineeringEngineeringTrap CentersStress-induced Leakage CurrentBias Temperature InstabilityApplied PhysicsGate InsulatorHot-holes InjectionSemiconductor Device FabricationIntegrated CircuitsThin Film Process TechnologyThin FilmsHot Carrier EffectsSilicon On InsulatorSemiconductor Device
The application of bias-stresses with high source-drain voltage and different gate voltages in polycrystalline thin-film transistors modifies the transconductance as well as the off current. These effects have been explained in terms of hot-holes injection into the gate insulator causing the formation of trap centers in the oxide and interface states near the drain.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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Hot-electron-induced MOSFET degradation&#8212;Model, monitor, and improvement
Chenming Hu, Simon Tam, Fu-Chieh Hsu et al. · IEEE Transactions on Electron Devices · 1985 · 1.1K citations