Absence of defect state creation in nanocrystalline silicon thin film transistors deduced from constant current stress measurements

Abstract

The authors discuss time and temperature dependences of the shift in threshold voltage (ΔVT) of nanocrystalline silicon (nc-Si) thin film transistors (TFTs) stressed at constant drain currents. In contrast to the behavior of the hydrogenated amorphous silicon (a-Si:H) counterpart, a weak temperature dependence of ΔVT was observed. The results follow the charge trapping model and the predicted stretched-exponential time dependence that saturates at prolonged stress times. In addition, ΔVT does not fit into the thermalization energy concept that was developed based on the defect state creation model for a-Si:H TFTs. The results indicate absence of defect state creation in nc-Si TFTs.