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Architecture and design of high-throughput, low-latency, and fault-tolerant routing algorithm for 3D-network-on-chip (3D-NoC)

EngineeringRouter ArchitectureComputer EngineeringFault-tolerant Routing AlgorithmComputer ArchitectureSystems EngineeringRobust RoutingNetwork On ChipRouter DesignInterconnection Network ArchitectureParallel Computing