IEEE Transactions on Device and Materials Reliability · 2002 · 28 citations · 1 references
EngineeringElectrical EngineeringCircuit TheoryMicroelectronicsSemiconductor DevicesCmos Circuit DesignDevice CharacterizationElectrical CharacterizationHigh-frequency Semiconductor DevicesIntegrated Circuit DesignMos CapacitorsCapacitance MeasurementCapacitance Measurement TechniquesCapacitance-voltage CharacteristicsCapacitance-voltage CharacterizationCapacitance-voltage MeasurementsCapacitorsParasitic EffectsParasitic Extraction
A new simple method of measuring capacitance-voltage characteristics of MOS devices is presented. Proceeding from the charge-based capacitance measurement technique suggested recently, a compact test structure with high resolution has been developed, which only requires measurement of do quantities. The method was tested on a 0.6-/spl mu/m CMOS process with small and large area capacitors and compared to well-known high-frequency capacitance-voltage results. Beside using a reference structure, a second means of extracting parasitic effects is demonstrated for small structures. The test structure allows measurements in a wide frequency range with high accuracy and low noise contribution at small capacitance levels.
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Dennis Sylvester, J.C. Chen, Chenming Hu · IEEE Journal of Solid-State Circuits · 1998 · 81 citations
Engineering, Computer Engineering, Electrical Engineering +17