2014 · 68 citations · 27 references
EngineeringComputer EngineeringFault-tolerant ComputingFault-tolerant SystemsMemoryDevice ReliabilityHardware Fault ToleranceMemory DevicesSpintronicsArea Overhead AnalysisCmos ReliabilityCmos ScalingEnduranceMagnetoresistive Random-access MemoryRandom Access Memory (Ram)Random-access MemorySpin-transfer Torque Memory
Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) has potential to become a universal memory technology because of its various advantageous features such as high density, non-volatility, scalability, high endurance and CMOS compatibility. However, read disturb is a major reliability issue in which a read operation can lead to a bitflip, because read and write current share the same path. This major reliability challenge is growing with technology scaling as read to write current ratio decreases. In this paper, we propose a circuit-level technique to detect read disturb by sensing the current during the read operation. Experimental results show that the proposed technique can effectively detect read disturb at the cost of negligible power and area overhead.
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Reducing cache power with low-cost, multi-bit error-correcting codes
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chishti et al. · 2010 · 198 citations