Ultra-high-density interconnection technology of three-dimensional packaging

Current Status of Research and Development for Three-Dimensional Chip Stack Technology

Kenji Takahashi, Hiroshi Terao, Yoshihiro TOMITA et al. · Japanese Journal of Applied Physics · 2001 · 175 citations

Engineering, Electrical Engineering, Microelectronics +12

Three dimensional metallization for vertically integrated circuits

Peter Ramm, D. Bollmann, Rosi Braun et al. · Microelectronic Engineering · 1997 · 91 citations

Engineering, Materials Engineering, Materials Science +14

Three-Diensional Integration Technology Based on Wafer Bonding Technique Using Micro-Bumps

Tsubasa Matsumoto, Y. Kudoh, M. Tahara et al. · 1995 · 49 citations

Engineering, Electrical Engineering, Microelectronics +13

Development of gold to gold interconnection flip chip bonding for chip on suspension assemblies

CHUNG-LEUNG LUK, Y.C. Chan, K.C. Hung · Microelectronics Reliability · 2002 · 47 citations

Engineering, Materials Engineering, Materials Science +14

Mechanical effects of copper through-vias in a 3D die-stacked module

N. Tanaka, T. Sato, Youhei Yamaji et al. · 2003 · 39 citations

Engineering, Materials Engineering, Materials Science +17