Testing of Stuck-Open Faults in Nanometer Technologies

Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits

Kaushik Roy, Subhas Chandra Mukhopadhyay, Hamid Mahmoodi · Proceedings of the IEEE · 2003 · 2.3K citations

Engineering, Computer Engineering, Electrical Engineering +17

Fault Modeling and Logic Simulation of CMOS and MOS Integrated Circuits

Ronald L. Wadsack · Bell System Technical Journal · 1978 · 613 citations

Engineering, Computer Engineering, Electrical Engineering +17

Sensitivity of double-gate and finfet devices to process variations

Shiying Xiong, Jeffrey Bokor · IEEE Transactions on Electron Devices · 2003 · 220 citations

Engineering, Electrical Engineering, Electronic Materials +16

High volume microprocessor test escapes, an analysis of defects our tests are missing

W. Needham, C. Prunty, Eng‐Kiong Yeoh · 2002 · 186 citations

Engineering, Electrical Engineering, Manufacturing Engineering +17

Testing for resistive opens and stuck opens

J.C.M. Li, Chao-Wen Tseng, E.J. McCluskey · 2002 · 147 citations

Engineering, Computer Engineering, Electrical Engineering +15