Victor Champac

CURRENT VS. LOGIC TESTING OF GATE OXIDE SHORT, FLOATING GATE AND BRIDGING FAILURES IN CMOS

R. Rodríguez‐Montañés, J. Segura, Victor Champac et al. · 2005 · 108 citations

Electrical Engineering, Engineering, Hardware Reliability +5

Electrical model of the floating gate defect in CMOS ICs: implications on I/sub DDQ/ testing

Victor Champac, Antonio Rubio, Joan Figueras · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1994 · 92 citations

Device Modeling, Electrical Engineering, Engineering +15

Quiescent current analysis and experimentation of defective CMOS circuits

J. Segura, Victor Champac, R. Rodr�guez-Monta��s et al. · Journal of Electronic Testing · 1992 · 50 citations · Full text

Electrical Engineering, Engineering, Circuit System +4

Noise-tolerance improvement in dynamic CMOS logic circuits

F. Mendoza-Hernández, Mónico Linares Aranda, Victor Champac · IEE Proceedings - Circuits Devices and Systems · 2006 · 43 citations

Hardware Security, Electrical Engineering, Standard Cmos Logic +15

Adaptive Error-Prediction Flip-flop for performance failure prediction with aging sensors

C. V. Martins, J. Semião, J. C. Vazquez et al. · 2011 · 35 citations

Engineering, Vlsi Design, Computer Architecture +18