Applied Physics Letters · 1982 · 17 citations · 8 references
EngineeringComputer EngineeringElectrical EngineeringLogicMicroelectronicsSemiconductor DevicesCmos Circuit DesignDelay ModelingDigital Logic DesignLow-power Digital Circuit DesignNanoelectronicsTiming AnalysisCircuit Delay ModelingCmos Logic CircuitsDynamic Power DissipationGate Delay ModelingHigh-speed Logic DesignJosephson JunctionsLogic Gate DelayLogic Gate Networks
Logic delays of resistor coupled Josephson logic (RCJL) have been investigated. An experimental circuit with a cascade chain of ten RCJL OR gates was fabricated using Pb-alloy Josephson IC technology with 5-μm minimum linewidth. Logic delay was measured to be as low as 10.8 ps with power dissipation of 11.7 μW. This demonstrates a switching operation faster than those reported for other Josephson gate designs. Comparison with computer-simulation results is also presented.
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Resistor coupled Josephson logic
J. Sone, Taichi Yoshida, Hiroyuki Abé · Applied Physics Letters · 1982 · 41 citations