Dynamic Power Dissipation
Dynamic Power Dissipation is a type of power dissipation in digital circuits that occurs due to the charging and discharging of capacitive loads during logic transitions, distinguished from static power dissipation by its dependence on switching activity and clock frequency.
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Citations
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801
Institutions
Publications per year
2017–2026
171
Variants
Switching Power Dissipation
Parents
1.3K
Leakage current: Moore's law meets static power
N.S. Kim, T. Austin, Trevor Mudge et al. · Computer · 2003 · 1.2K citations
Engineering, Computer Engineering, Electrical Engineering +13
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Intel (United States)
Santa Clara, United States
25 h-index
95 publications
5.1K citations
Purdue University West Lafayette
West Lafayette, United States
23 h-index
75 publications
4.7K citations
Stanford University
Stanford, United States
20 h-index
55 publications
4.3K citations
University of Southern California
Los Angeles, United States
19 h-index
69 publications
2.4K citations

University of Rochester
Rochester, United States
18 h-index
59 publications
3.2K citations
Georgia Institute of Technology
Atlanta, United States
17 h-index
59 publications
2.6K citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
16 h-index
65 publications
2.3K citations
IBM (United States)
Armonk, United States
15 h-index
46 publications
1.9K citations
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96 publications · 5.7K citations
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61 publications · 4.4K citations
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17 publications · 673 citations
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16 publications · 475 citations
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