2013 · 14 citations · 7 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureMicroelectronicsVulnerability AnalysisStatic Vulnerability AnalysisTiming AnalysisTiming ModelingDynamic Timing AnalysisMicroarchitectural Timing AnalysisSequential InstructionSoft Error DetectionSoft Error MitigationStatic Timing AnalysisSynchronous Timing AnalysisVulnerability
An efficient and novel technique for computing timing vulnerability factors (TVF) in modern complex synchronous designs is introduced, where all key inputs are based on static timing data readily available in most design databases. The benefits of TVF for modern microprocessors and strategies to reduce TVF, and hence the overall soft error rate (SER), are presented.
7
Chip-level soft error estimation method
Hang Tuan Nguyen, Y. Yagil, N. Seifert et al. · IEEE Transactions on Device and Materials Reliability · 2005 · 112 citations
Engineering, Computer Engineering, Electrical Engineering +17