Novel gate-recessed vertical InAs/GaSb TFETs with record high I<inf>ON</inf> of 180 μA/μm at V<inf>DS</inf> = 0.5 V

Abstract

Vertical tunnel field-effect transistors (TFETs) in which the gate field is aligned with the tunneling direction have been fabricated using a novel gate-recess process, resulting in record on-current. The tunnel junction consists of InAs/GaSb with a broken band alignment. The gate-recess process results in low drain contact and access resistances; together with the favorable broken gap heterojunction, this leads to a record high I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> of 180 μA/μm at V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> = V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> = 0.5 V with an I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ratio of 6 ×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> . Both SiN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> passivation and forming gas anneal (FGA) were found to improve the device subthreshold swing (SS), resulting in a SS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MIN</sub> of 200 mV/dec at 300 K and 50 mV/dec at 77 K. Capacitance-voltage (C-V) measurements indicate that the device SS performance is limited by interfacial trap density (D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> ).