Automatic Leakage Control for Wide Range Performance QDI Asynchronous Circuits in FD-SOI Technology

Abstract

This paper focuses on the reduction of static power consumption for high performance asynchronous circuits. The key idea of this contribution is to take benefit from the extensive capabilities of performance boosting of Fully Depleted Silicon On Insulator technology, associated to the specific architecture of Quasi Delay Insensitive asynchronous circuits, to implement an automatic fine grain control of the leakage. The principle of this technique relies on a back plane biasing mechanism automatically controlled by data activity detection. Electrical simulations performed in STMicroelectonics 28 nm CMOS UTTB FD-SOI technology demonstrate the efficiency of the approach on different asynchronous operators.