Superior cut-off characteristics of L g =40nm W fin =7nm poly Ge junctionless Tri-gate FET for stacked 3D circuits integration

Abstract

Poly Ge junctionless (JL) Tri-gate p-FETs with Lg of 40nm and fin width of 7nm has been demonstrated. Major drawbacks in Ge channel such as junction leakage current and DIBL have been overcome by JL FETs with Tri-gate. Ion/Ioff >105 at Vd=-1V, SS=158mV/decade and DIBL of as small as 74mV/V are obtained, which are comparable or better than the counterparts of crystalline Ge devices. Vth roll-off as well as DIBL of JL FETs with thin W are improved in short channel regime.