Standard Cell Design

Standard Cell Design is a methodology in VLSI design that belongs to the class of integrated circuit layout techniques and is distinguished by the use of pre-characterized, reusable logic cells with uniform physical configurations to enable automated, high-density, and timing-predictable synthesis of digital circuits.

850

Publications

32.5K

Citations

2.4K

Authors

450

Institutions

Publications per year

2017–2026

135

Authors

2.4K

  1. DZ
    David Z. Pan

    The University of Texas at Austin, United States

    22 publications · 740 citations

    17

    h-index

  2. JR
    Julien Ryckaert

    IMEC, Belgium

    19 publications · 923 citations

    15

    h-index

  3. AB
    Andrew B. Kahng

    University of California San Diego, United States

    18 publications · 679 citations

    14

    h-index

  4. YC
    Yao‐Wen Chang

    National Taiwan University, Taiwan

    16 publications · 443 citations

    14

    h-index

  5. BY
    Bei Yu

    Chinese University of Hong Kong, Hong Kong SAR China

    14 publications · 442 citations

    13

    h-index

1–5 of 2.4K

Venues

  1. 33

    h-index

  2. IEEE Journal of Solid-State Circuits

    34 publications · 3K citations

    23

    h-index

  3. 16

    h-index

  4. 14

    h-index

  5. International Conference on Computer Aided Design

    Conference · 15 publications · 290 citations

    13

    h-index

1–5