Cell Width Optimization
Cell Width Optimization is a design methodology in integrated circuit physical design that systematically determines the optimal width of standard cells to minimize area, power, or delay while maintaining routability and adherence to design rules.
25
Publications
742
Citations
110
Authors
37
Institutions
Publications per year
2017–2026
3
Parents
25
David C. Burnett, Sanjay Parihar, Hema Ramamurthy et al. · 2014 · 32 citations
Engineering, Computer Engineering, Electrical Engineering +17
1–5 of 25
110
2
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1
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1–5 of 110
37
Samsung (South Korea)
Seoul, South Korea
2 h-index
6 publications
100 citations
University of Michigan
Ann Arbor, United States
2 h-index
4 publications
82 citations
Politecnico di Milano
Milan, Italy
1 h-index
2 publications
30 citations
University at Albany, State University of New York
Albany, United States
1 h-index
1 publications
32 citations

Xi'an Jiaotong University
Xi'an, China
1 h-index
9 publications
144 citations

Uppsala University
Uppsala, Sweden
1 h-index
2 publications
64 citations
Korea Advanced Institute of Science and Technology
Daejeon, South Korea
1 h-index
2 publications
50 citations

University of Freiburg
Freiburg im Breisgau, Germany
1 h-index
1 publications
14 citations
1–8 of 37
1 publications · 31 citations
1
h-index
1 publications · 32 citations
1
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1 publications · 25 citations
1
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1 publications · 34 citations
1
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1 publications · 23 citations
1
h-index
1–5