Cell Library Validation is the systematic verification process within integrated circuit design that assesses a standard cell library’s compliance with predefined electrical, timing, physical, and functional specifications to ensure its correctness, consistency, and manufacturability across technology nodes.
8
Publications
157
Citations
27
Authors
11
Institutions
Publications per year
2017–2026
1
Parents
Publications
8
Jane Peppard, Catherine A. Rugg, Matthew A. Smicker et al. · Current Chemical Genomics and Translational Medicine · 2014 · 36 citations · Full text
1–5 of 8
Authors
27
- JP
1
h-index
- AM
1
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- ML
1
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- MA
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- PR
1
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1–5 of 27
Institutions
11
Sanofi (France)
Paris, France
1 h-index
5 publications
180 citations
Institute of Microelectronics
Beijing, China
1 h-index
4 publications
48 citations
Intel (United States)
Santa Clara, United States
1 h-index
3 publications
39 citations
ITRI International
San Jose, United States
1 h-index
1 publications
10 citations
Institute for Design Problems in Microelectronics
Moscow, Russia
1 h-index
3 publications
30 citations
IMEC
Leuven, Belgium
1 h-index
2 publications
30 citations
Chinese Academy of Sciences
Beijing, China
1 h-index
4 publications
48 citations
University of Stuttgart
Stuttgart, Germany
1 h-index
2 publications
82 citations
1–8 of 11
Venues
- Current Chemical Genomics and Translational Medicine
1 publications · 36 citations
1
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- Microelectronics Reliability
1 publications · 15 citations
1
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- Journal of Semiconductors
1 publications · 12 citations
1
h-index
- IEEE Transactions on Circuits and Systems I Regular Papers
1 publications · 41 citations
1
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- Russian Microelectronics
1 publications · 10 citations
1
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1–5