Power Integrity Checking

Power Integrity Checking is a design rule checking method that verifies the electrical performance of power delivery networks in integrated circuits to ensure stable voltage distribution and minimize noise, distinguishing it from other design rule checks by focusing specifically on power grid robustness and electromagnetic reliability.

16

Publications

362

Citations

57

Authors

27

Institutions

Publications per year

2017–2026

5

Authors

57

  1. BA
    Bruce Archambeault

    IBM (United States), United States

    2 publications · 28 citations

    2

    h-index

  2. LS
    Larry Smith

    University at Albany, State University of New York, United States

    2 publications · 35 citations

    2

    h-index

  3. FD
    Francesco de Paulis

    University of L'Aquila, Italy

    2 publications · 59 citations

    2

    h-index

  4. SH
    S.E. Huq

    Rutherford Appleton Laboratory, United Kingdom

    1 publications · 15 citations

    1

    h-index

  5. FC
    F. Carrió Argos

    Institut de Recherche sur les Lois Fondamentales de l'Univers, France

    1 publications · 12 citations

    1

    h-index

1–5 of 57

Venues

  1. IEEE Transactions on Advanced Packaging

    1 publications · 42 citations

    1

    h-index

  2. 1

    h-index

  3. IEEE Electromagnetic Compatibility Magazine

    1 publications · 17 citations

    1

    h-index

  4. 1

    h-index

  5. The Open Optics Journal

    TOOJ · 1 publications · 12 citations

    1

    h-index

1–5