Design Rule Checking

Design Rule Checking is a verification methodology in integrated circuit design that systematically ensures a physical layout adheres to a foundry’s prescribed geometric and connectivity constraints to guarantee manufacturability and electrical correctness.

208

Publications

7.3K

Citations

656

Authors

175

Institutions

Publications per year

2017–2026

26

Authors

656

  1. JK
    John K. Ousterhout

    University of California, Berkeley, United States

    8 publications · 550 citations

    8

    h-index

  2. AB
    Andrew B. Kahng

    University of California San Diego, United States

    8 publications · 264 citations

    8

    h-index

  3. GT
    G. Taylor

    University of California, Berkeley, United States

    6 publications · 505 citations

    6

    h-index

  4. RN
    Robert N. Mayo

    University of California, Berkeley, United States

    4 publications · 431 citations

    4

    h-index

  5. WM
    W. Maly

    Carnegie Mellon University, United States

    4 publications · 149 citations

    4

    h-index

1–5 of 656

Venues

  1. 14

    h-index

  2. 13

    h-index

  3. Design Automation Conference

    Conference · 15 publications · 492 citations

    12

    h-index

  4. 19th Design Automation Conference

    Conference · 5 publications · 94 citations

    5

    h-index

  5. 21st Design Automation Conference Proceedings

    Conference · 4 publications · 209 citations

    4

    h-index

1–5