Antenna Rule Checking is a design verification methodology within integrated circuit physical design that identifies violations arising from charge accumulation during fabrication due to conductive paths connected to unprotected gate terminals, thereby ensuring manufacturability and reliability.
2
Publications
54
Citations
9
Authors
5
Institutions
Publications per year
2017–2026
0
Variants
Antenna Effect CheckingAntenna Violation Checking
Parents
Publications
2
Detection of an antenna effect in VLSI designs
W. Maly, C. Ou-Yang, Saswati Ghosh et al. · 2002 · 32 citations
Engineering, Computer Engineering, Electrical Engineering +16
1–3 of 2
Authors
9
- CO
1
h-index
- HXHua Xiang
IBM Research - Thomas J. Watson Research Center, United States
1 publications · 22 citations
1
h-index
- IL
1
h-index
- SM
1
h-index
- SG
1
h-index
1–5 of 9
Institutions
5
University of Illinois Urbana-Champaign
Urbana, United States
1 h-index
2 publications
44 citations
Carnegie Mellon University
Pittsburgh, United States
1 h-index
4 publications
128 citations
Texas Instruments (United States)
Dallas, United States
1 h-index
1 publications
32 citations
Cadence Design Systems (United States)
San Jose, United States
1 h-index
2 publications
44 citations
The University of Texas at Austin
Austin, United States
1 h-index
1 publications
22 citations
GlobalFoundries (Germany)
Dresden, Germany
1 publications
13 citations
GlobalFoundries (United States)
Santa Clara, United States
1 publications
13 citations
GlobalFoundries (Singapore)
Singapore, Singapore
1 publications
13 citations
1–8 of 5
Venues
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
1 publications · 22 citations
1
h-index
- 2022 IEEE International Reliability Physics Symposium (IRPS)
Conference · 1 publications · 13 citations
1–2