Geometric Rule Checking
Geometric Rule Checking is a formal verification method in integrated circuit design that systematically enforces manufacturing constraints by evaluating layout geometries against a set of minimum spacing, width, and overlap rules to ensure fabricability and reliability.
22
Publications
555
Citations
48
Authors
22
Institutions
Publications per year
2017–2026
0
Parents
22
A correct rule-based geometric constraint solver
Robert Joan‐Arinyo, A. Soto · Computers & Graphics · 1997 · 69 citations
Standard cell routing via boolean satisfiability
Nikolai Ryzhenko, Steven M. Burns · 2012 · 55 citations
SURF: rubber-band routing system for multichip modules
David Staepelaere, Jason P. Jue, Tal Dayan et al. · IEEE Design & Test of Computers · 1993 · 48 citations
1–5 of 22
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22
University of California, Berkeley
Berkeley, United States
3 h-index
4 publications
73 citations
Bell (Canada)
Montreal, Canada
2 h-index
4 publications
49 citations
Massachusetts Institute of Technology
Cambridge, United States
2 h-index
2 publications
41 citations

University of Minnesota
Minneapolis, United States
2 h-index
4 publications
48 citations
The University of Tokyo
Tokyo, Japan
1 h-index
3 publications
168 citations

City University of Hong Kong
Hong Kong, Hong Kong
1 h-index
1 publications
22 citations

Shanghai Jiao Tong University
Shanghai, China
1 h-index
1 publications
22 citations
Tokyo University of the Arts
Tokyo, Japan
1 h-index
3 publications
168 citations
1–8 of 22
Conference · 5 publications · 107 citations
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3 publications · 54 citations
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2 publications · 125 citations
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Conference · 2 publications · 27 citations
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Conference · 1 publications · 12 citations
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