Pipelined Memory

Pipelined Memory is a memory modeling technique in computer architecture that belongs to the class of memory access optimization methods, specifically characterized by overlapping the stages of memory operations to improve throughput through concurrent processing of multiple memory requests.

113

Publications

3.8K

Citations

433

Authors

119

Institutions

Publications per year

2017–2026

8

Authors

433

  1. VK
    Viktor K. Prasanna

    University of Southern California, United States

    4 publications · 160 citations

    4

    h-index

  2. SS
    Sartaj Sahni

    University of Florida, United States

    3 publications · 109 citations

    3

    h-index

  3. TS
    Timothy Sherwood

    University of California, Santa Barbara, United States

    3 publications · 107 citations

    3

    h-index

  4. GV
    George Varghese

    University of California San Diego, United States

    3 publications · 198 citations

    3

    h-index

  5. SM
    Simon Mall

    Nvidia (United Kingdom), United Kingdom

    2 publications · 26 citations

    2

    h-index

1–5 of 433

Venues

  1. IEEE Journal of Solid-State Circuits

    15 publications · 562 citations

    13

    h-index

  2. IEEE Transactions on Computers

    4 publications · 129 citations

    4

    h-index

  3. 3

    h-index

  4. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 3 publications · 134 citations

    3

    h-index

  5. ACM SIGARCH Computer Architecture News

    2 publications · 61 citations

    2

    h-index

1–5