Concepedia

Layout Parasitics Modeling

Layout Parasitics Modeling is a computational methodology in mixed-signal integrated circuit design that characterizes and predicts unintended electrical effects arising from physical layout structures, distinguishing it from functional circuit modeling by explicitly accounting for parasitic capacitances, resistances, and inductances inherent in fabricated geometries.

460

Publications

17.7K

Citations

1.5K

Authors

374

Institutions

Publications per year

2017–2026

51

Parents

Publications

460

Physical modeling of spiral inductors on silicon

C. Patrick Yue, S.S. Wong · IEEE Transactions on Electron Devices · 2000 · 843 citations

, , +16

An improved de-embedding technique for on-wafer high-frequency characterization

M.C.A.M. Koolen, J.A.M. Geelen, M. Versleijen · 2002 · 585 citations

, , +16

A Multiparameter Moment-Matching Model-Reduction Approach for Generating Geometrically Parameterized Interconnect Performance Models

Luca Daniel, O.C. Siong, L.S. Chay et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2004 · 342 citations · Full text

, , +17

Modeling and analysis of substrate coupling in integrated circuits

Ranjit Gharpurey, Ralf Meyer · IEEE Journal of Solid-State Circuits · 1996 · 309 citations

, , +14

Improved three-step de-embedding method to accurately account for the influence of pad parasitics in silicon on-wafer RF test-structures

E.P. Vandamme, Dominique Schreurs, G. Van Dinther · IEEE Transactions on Electron Devices · 2001 · 256 citations

, , +16

1–5 of 460

Authors

1.5K

  1. JF
    Jun Fan

    Missouri University of Science and Technology, United States

    13 publications · 497 citations

    12

    h-index

  2. DA
    D.J. Allstot

    University of Washington, United States

    8 publications · 494 citations

    8

    h-index

  3. RV
    Ranga Vemuri

    University of Cincinnati, United States

    8 publications · 206 citations

    8

    h-index

  4. LZ
    Lihong Zhang

    Memorial University of Newfoundland, Canada

    7 publications · 184 citations

    7

    h-index

  5. AS
    Alberto Sangiovanni‐Vincentelli

    University of California, Berkeley, United States

    7 publications · 288 citations

    7

    h-index

1–5 of 1.5K

Institutions

374

  1. IBM (United States)

    Armonk, United States

    19 h-index

    65 publications

    2.5K citations

  2. Missouri University of Science and Technology

    Rolla, United States

    14 h-index

    60 publications

    1.8K citations

  3. University of California, Berkeley

    Berkeley, United States

    12 h-index

    24 publications

    1.2K citations

  4. Intel (United States)

    Santa Clara, United States

    11 h-index

    27 publications

    1.3K citations

  5. Georgia Institute of Technology

    Atlanta, United States

    11 h-index

    34 publications

    876 citations

  6. KU Leuven

    Leuven, Belgium

    11 h-index

    39 publications

    1.8K citations

  7. IBM Research - Thomas J. Watson Research Center

    Yorktown Heights, United States

    11 h-index

    23 publications

    2.2K citations

  8. Texas Instruments (United States)

    Dallas, United States

    10 h-index

    40 publications

    2.2K citations

1–8 of 374

Venues

  1. IEEE Transactions on Electron Devices

    39 publications · 2.5K citations

    23

    h-index

  2. 18

    h-index

  3. 13

    h-index

  4. IEEE Journal of Solid-State Circuits

    11 publications · 1.1K citations

    11

    h-index

  5. 11

    h-index

1–5