IEEE Transactions on Electron Devices · 2000 · 843 citations · 26 references
EngineeringElectrical EngineeringCircuit TheoryMicroelectronicsSemiconductor DevicesCmos Circuit DesignDevice ModelingIntegrated Circuit DesignPhysical DesignSpiral StructureVery-large-scale Integration LayoutCapacitanceInductance CalculationInductor DesignInductorsLayout Parasitics ModelingParasitic Inductance EffectsProcess ParametersProcess Parameters Optimization
This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance.
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H.A. Wheeler · Proceedings of the IRE · 1942 · 749 citations
R.A. Pucel, D. Massé, C.P. Hartwig · IEEE Transactions on Microwave Theory and Techniques · 1968 · 528 citations