On-chip spiral inductors with patterned ground shields for Si-based RF ICs

TLDR

The paper proposes inserting a patterned ground shield between an on‑chip spiral inductor and the silicon substrate. The shield is fabricated with standard silicon processes and its resistance, pattern, inductance, parasitic resistances, capacitances, and quality‑factor effects are systematically investigated. Experiments show that a polysilicon patterned ground shield increases the inductor quality factor by up to 33 % at 1–2 GHz, reduces substrate coupling between adjacent inductors by up to 25 dB, and nearly doubles the quality factor of a 2‑GHz LC tank.

Abstract

This paper presents a patterned ground shield inserted between an on-chip spiral inductor and silicon substrate. The patterned ground shield can be realized in standard silicon technologies without additional processing steps. The impacts of shield resistance and pattern on inductance, parasitic resistances and capacitances, and quality factor are studied extensively. Experimental results show that a polysilicon patterned ground shield achieves the most improvement. At 1-2 GHz, the addition of the shield increases the inductor quality factor up to 33% and reduces the substrate coupling between two adjacent inductors by as much as 25 dB. We also demonstrate that the quality factor of a 2-GHz LC tank can be nearly doubled with a shielded inductor.