Ranga Vemuri - Concepedia

Author

Ranga Vemuri

University of Cincinnati ORCID

Also Known As

A. Vemuri, R. R. Vemuri, R. Vemuri, R.R. Vemuri, Rajendra Babu Vemuri, Ranga R. Vemuri, Ranga Vemuri, Vemuri, Ranga

408

Publications

3.9K

Citations

H-Index

123

Concepts

All Affiliations

University of Cincinnati Stony Brook University

About

Ranga Vemuri is an author at University of Cincinnati specializing in engineering, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	27	93	2.6K
2	Natural Sciences	2	2	28
3	Social Sciences	2	2	37
4	Architectural Engineering	2	2	38
5	Applied Physics	1	1	20

Ranga Vemuri

102

Publications

2.9K

Citations

H-Index

Page 1

	Year	Citations
Extraction and use of neural network models in automated synthesis of operational amplifiers Glenn Wolfe, Ranga Vemuri IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Circuit AnalysisEngineeringMachine LearningCircuit DesignAnalog Design	2003	137
An integrated multicomponent synthesis environment for MCMs Ranga Vemuri, Nand Kumar, Raghu Vutukuru, Computer EngineeringIndustrial EngineeringComputer ArchitectureSystem-level DesignSystem Synthesis	1993	115
Hardware-software partitioning and pipelined scheduling of transformative applications Karam S. Chatha, Ranga Vemuri IEEE Transactions on Very Large Scale Integration (VLSI) Systems Iterative PartitioningHeterogeneous ComputingEngineeringAdvanced ComputingHardware Algorithm	2002	108
An efficient algorithm for finding empty space for online FPGA placement Manish Handa, Ranga Vemuri EngineeringAdvanced ComputingHardware AlgorithmComputer ArchitectureComputational Complexity	2004	102
An automated temporal partitioning and loop fission approach for FPGA based reconfigurable synthesis of DSP applications Meenakshi Kaul, Ranga Vemuri, S. Govindarajan,	1999	85
Profile-driven behavioral synthesis for low-power VLSI systems Naveen Kumar, Srinivas Katkoori, L. Rader, IEEE Design & Test of Computers EngineeringVlsi DesignElectronic Design AutomationComputer ArchitectureSystem Synthesis	1995	82
LiPaR B. Sethuraman, Prasun Bhattacharya, Jawad Khan, Hardware SecurityEngineeringEdge ComputingRouter ArchitectureComputer Engineering	2005	77
Generation of design verification tests from behavioral VHDL programs using path enumeration and constraint programming Ranga Vemuri, R. Kalyanaraman IEEE Transactions on Very Large Scale Integration (VLSI) Systems EngineeringVerificationComputer-aided VerificationSoftware EngineeringSoftware Analysis	1995	76
DSS: a distributed high-level synthesis system J. Roy, Naveen Kumar, Raj Gautam Dutta, IEEE Design & Test of Computers EngineeringDss PerformanceComputer ArchitectureParallel ImplementationSystem-level Design	1992	64
Optimal temporal partitioning and synthesis for reconfigurable architectures Meenakshi Kaul, Ranga Vemuri Design, Automation, and Test in Europe EngineeringCompiler TechnologyComputer ArchitectureSoftware EngineeringSystem Synthesis	1998	57

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