Extraction and use of neural network models in automated synthesis of operational amplifiers

Abstract

Fast and accurate performance estimation methods are essential to automated synthesis of analog circuits. Development of analog performance models is difficult due to the highly nonlinear nature of various analog performance parameters. This paper presents a neural network-based methodology for creating fast and efficient models for estimating the performance parameters of CMOS operational amplifier topologies. Effective methods for generation and use of the training data are proposed to enhance the accuracy of the neural models. The efficiency and accuracy of the resulting performance models are demonstrated via their use in a genetic algorithm-based circuit synthesis system. The genetic synthesis tool optimizes a fitness function based on user-specified performance constraints. The performance parameters of the synthesized circuits are validated by SPICE simulations and compared with those predicted by the neural network models. Experimental studies demonstrate that neural network modeling is an effective, fast, and accurate methodology for performance estimation.