Interconnect Fault Analysis
Interconnect Fault Analysis is a diagnostic methodology within hardware debugging that identifies and characterizes defects in the physical or logical connections between components by analyzing signal integrity, continuity, and communication anomalies to distinguish faulty interconnects from other hardware failure modes.
118
Publications
3.6K
Citations
279
Authors
124
Institutions
Publications per year
2017–2026
9
Parents
118
Built-in self-test of FPGA interconnect
Charles E. Stroud, Sajith Wijesuriya, C. Hamilton et al. · 2002 · 157 citations
Engineering, Computer Engineering, Electrical Engineering +17
A test methodology for interconnect structures of LUT-based FPGAs
Hiroyuki Michinishi, Tokumi Yokohira, Tatsuki Okamoto et al. · 2002 · 85 citations · Full text
1–5 of 118
279
10
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7
h-index
Universidade Federal do Rio Grande do Sul, Brazil
5 publications · 177 citations
5
h-index
5
h-index
4
h-index
1–5 of 279
124
Northeastern University
Boston, United States
10 h-index
15 publications
306 citations
Intel (United States)
Santa Clara, United States
9 h-index
15 publications
445 citations
Stanford University
Stanford, United States
6 h-index
7 publications
189 citations
Universidade Federal do Rio Grande do Sul
Porto Alegre, Brazil
6 h-index
32 publications
1.2K citations

University of Massachusetts Amherst
Amherst Center, United States
5 h-index
9 publications
352 citations
National Central University
Taoyuan City, Taiwan
4 h-index
5 publications
82 citations

University of Freiburg
Freiburg im Breisgau, Germany
4 h-index
14 publications
326 citations
University of California San Diego
San Diego, United States
4 h-index
10 publications
217 citations
1–8 of 124
11 publications · 371 citations
11
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JETTA · 5 publications · 95 citations
5
h-index
4 publications · 112 citations
4
h-index
3 publications · 54 citations
3
h-index
2 publications · 70 citations
2
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1–5