Érika Cota - Concepedia

Author

Érika Cota

Universidade Federal do Rio Grande do Sul ORCID

Also Known As

Cota, E, Cota, E.F., Cota, Erika, Cota, Erika Fernandes, Cota, Érika, Cota, Érika F., E. Cota, E. F. Cota, E.F. Cota, Erika Cota

115

Publications

1.3K

Citations

H-Index

Concepts

All Affiliations

Universidade Federal do Rio Grande do Sul Techniques of Informatics and Microelectronics for Integrated Systems Architecture University of Nebraska–Lincoln Pontifícia Universidade Católica do Rio Grande do Sul Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier

ÉC

About

Érika Cota is an author at Universidade Federal do Rio Grande do Sul specializing in computer engineering, engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	19	30	1.1K
2	Computer Engineering	19	29	1.1K
3	Medicine	2	2	27
4	Education	1	1	14
5	Social Sciences	1	1	13

Érika Cota

Publications

1.2K

Citations

H-Index

Page 1

	Year	Citations
A scalable test strategy for network-on-chip routers Alexandre M. Amory, Eduardo Brião, Érika Cota, EngineeringRouter ArchitectureSoftware TestingFault CoverageComputer Engineering	2006	102
The impact of NoC reuse on the testing of core-based systems Érika Cota, Márcio Kreutz, Cesar Albenes Zeferino, Software MaintenanceEngineeringComputer ArchitectureSoftware EngineeringSystem Test Time	2003	83
A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip Érika Cota, Fernanda Lima Kastensmidt, Marcos Hervé IEEE Transactions on Computers EngineeringHandshake InterconnectsComputer ArchitectureNetwork AnalysisInterconnection Network Architecture	2008	80
Reusing an on-chip network for the test of core-based systems Érika Cota, Luigi Carro, Marcelo Lubaszewski ACM Transactions on Design Automation of Electronic Systems EngineeringComputer ArchitectureInterconnection Network ArchitectureEmbedded SystemsHardware Security	2004	75
Power-aware noc reuse on the testing of core-based systems Érika Cota, Luigi Carro, Flávio Rech Wagner, Hardware SecurityPower-aware ComputingReliability EngineeringPower-aware Noc ReuseEngineering	2004	73
Power-Aware Test Scheduling in Network-on-Chip Using Variable-Rate On-Chip Clocking Chunsheng Liu, V. Iyengar, Jiangfan Shi, Hardware SecurityPower-aware Test SchedulingPower-aware ComputingEngineeringSoftware Testing	2005	61
Dependable Network-on-Chip Router Able to Simultaneously Tolerate Soft Errors and Crosstalk Arthur Pereira Frantz, Fernanda Lima Kastensmidt, Luigi Carro, Proceedings/Proceedings - International Test Conference Hardware SecurityReliability EngineeringEngineeringFault-tolerant NetworkFault Tolerant Techniques	2006	54
Test scheduling for network-on-chip with BIST and precedence constraints Chunsheng Liu, Érika Cota, Hamid Sharif, Hardware SecurityTest SchedulingEngineeringSoftware TestingDedicated Routing Path	2005	53
Constraint-Driven Test Scheduling for NoC-Based Systems Érika Cota, C. Liu IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems EngineeringComputer ArchitectureScheduling AlgorithmInterconnection Network ArchitectureFormal Verification	2006	52
Crosstalk- and SEU-Aware Networks on Chips Arthur Pereira Frantz, Maico Cassel, Fernanda Lima Kastensmidt, IEEE Design & Test of Computers Hardware SecurityElectrical EngineeringComplex Noc DesignsEngineeringHardware Architecture	2007	41

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