Input Pad Protection
Input Pad Protection is a circuit-level safeguarding technique in electrostatic discharge protection that specifically incorporates dedicated structures or devices at the input pad of an integrated circuit to divert transient electrostatic currents and limit voltage overshoot, thereby preventing damage to sensitive core components.
25
Publications
979
Citations
71
Authors
19
Institutions
Publications per year
2017–2026
2
25
1–5 of 25
71
4
h-index
3
h-index
2
h-index
2
h-index
2
h-index
1–5 of 71
19

National Yang Ming Chiao Tung University
Hsinchu, Taiwan
6 h-index
13 publications
579 citations
Texas Instruments (United States)
Dallas, United States
4 h-index
8 publications
720 citations
Taiwan Semiconductor Manufacturing Company (Taiwan)
Hsinchu, Taiwan
3 h-index
13 publications
236 citations

Illinois Institute of Technology
Chicago, United States
2 h-index
6 publications
81 citations
Industrial Technology Research Institute
Hsinchu, Taiwan
2 h-index
2 publications
40 citations
University of California, Berkeley
Berkeley, United States
2 h-index
4 publications
64 citations
DuPont (United States)
Wilmington, United States
1 h-index
1 publications
17 citations
Centro de Estudios e Investigaciones Técnicas de Gipuzkoa
San Sebastian, Spain
1 h-index
1 publications
16 citations
1–8 of 19
4 publications · 278 citations
4
h-index
3 publications · 102 citations
3
h-index
2 publications · 254 citations
2
h-index
2 publications · 43 citations
2
h-index
1 publications · 66 citations
1
h-index
1–5