Digital Circuit Self-Testing is a built-in testing methodology that enables a digital circuit to autonomously perform fault detection and diagnosis through embedded test logic and predefined test patterns without reliance on external test equipment.
441
Publications
18.4K
Citations
847
Authors
281
Institutions
Publications per year
2017–2026
11
Parents
Publications
441
V. Dabholkar, S. Chakravarty, Irith Pomeranz et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1998 · 320 citations
1–5 of 441
Authors
847
- HW
11
h-index
- EM
11
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- KK
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10
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1–5 of 847
Institutions
281
Stanford University
Stanford, United States
19 h-index
43 publications
2.7K citations
Mentor Technologies
Tulsa, United States
12 h-index
31 publications
2.1K citations
University of Wisconsin–Madison
Madison, United States
11 h-index
17 publications
1.4K citations
University of Stuttgart
Stuttgart, Germany
11 h-index
25 publications
1.5K citations
IBM (United States)
Armonk, United States
10 h-index
13 publications
876 citations
University of Southern California
Los Angeles, United States
10 h-index
17 publications
665 citations
Karlsruhe Institute of Technology
Karlsruhe, Germany
9 h-index
14 publications
402 citations
University of Michigan
Ann Arbor, United States
9 h-index
15 publications
402 citations
1–8 of 281
Venues
- IEEE Transactions on Computers
35 publications · 2.5K citations
24
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- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
24 publications · 1.6K citations
18
h-index
- IEEE Design & Test of Computers
17 publications · 1.1K citations
14
h-index
- Journal of Electronic Testing
JETTA · 12 publications · 410 citations
12
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- International Test Conference
Conference · 10 publications · 496 citations
10
h-index
1–5