Channel Potential Control

Channel Potential Control is a semiconductor device engineering methodology that governs the electrostatic potential distribution within the conducting channel of a transistor to mitigate short-channel effects by enhancing gate electrode influence over channel charge carriers.

34

Publications

1.1K

Citations

153

Authors

63

Institutions

Publications per year

2017–2026

6

Authors

153

  1. GL
    Guang-Li Luo

    National Institutes of Applied Research, Taiwan

    2 publications · 33 citations

    2

    h-index

  2. CC
    Chao-Hsin Chien

    National Yang Ming Chiao Tung University, Taiwan

    2 publications · 33 citations

    2

    h-index

  3. CC
    Che-Wei Chen

    National Yang Ming Chiao Tung University, Taiwan

    2 publications · 33 citations

    2

    h-index

  4. CC
    Cheng-Ting Chung

    National Yang Ming Chiao Tung University, Taiwan

    2 publications · 33 citations

    2

    h-index

  5. YT
    Yuan Taur

    University of California San Diego, United States

    1 publications · 17 citations

    1

    h-index

1–5 of 153

Venues

  1. IEEE Electron Device Letters

    8 publications · 252 citations

    8

    h-index

  2. IEEE Transactions on Electron Devices

    7 publications · 189 citations

    7

    h-index

  3. Applied Physics Letters

    3 publications · 62 citations

    3

    h-index

  4. Journal of Materials Chemistry C

    2 publications · 91 citations

    2

    h-index

  5. Solid-State Electronics

    2 publications · 104 citations

    2

    h-index

1–5