Channel Potential Control
Channel Potential Control is a semiconductor device engineering methodology that governs the electrostatic potential distribution within the conducting channel of a transistor to mitigate short-channel effects by enhancing gate electrode influence over channel charge carriers.
34
Publications
1.1K
Citations
153
Authors
63
Institutions
Publications per year
2017–2026
6
Parents
34
A Novel Barrier Controlled Tunnel FET
Hao Wang, Sheng Chang, Yue Hu et al. · IEEE Electron Device Letters · 2014 · 75 citations
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63

Peking University
Beijing, China
3 h-index
11 publications
875 citations
Institute of Microelectronics
Beijing, China
3 h-index
12 publications
778 citations
National Institutes of Applied Research
Taipei, Taiwan
2 h-index
4 publications
66 citations
Pusan National University
Busan, South Korea
2 h-index
3 publications
89 citations

National Yang Ming Chiao Tung University
Hsinchu, Taiwan
2 h-index
8 publications
135 citations
Hewlett-Packard (United States)
Palo Alto, United States
1 h-index
1 publications
12 citations
Indian Institute of Technology Delhi
New Delhi, India
1 h-index
2 publications
46 citations
Hangzhou Dianzi University
Hangzhou, China
1 h-index
2 publications
150 citations
1–8 of 63
8 publications · 252 citations
8
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7 publications · 189 citations
7
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3 publications · 62 citations
3
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2 publications · 91 citations
2
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2 publications · 104 citations
2
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1–5