J.-Y. Yeh

A 22nm SoC platform technology featuring 3-D tri-gate and high-k/metal gate, optimized for ultra low power, high performance and high density SoC applications

C.-H. Jan, Uma Bhattacharya, R. Brain et al. · 2012 · 305 citations

Engineering, Computer Engineering, Electrical Engineering +16

RF CMOS technology scaling in High-k/metal gate era for RF SoC (system-on-chip) applications

C.-H. Jan, M. Agostinelli, H. Deshpande et al. · 2010 · 84 citations

Engineering, Electrical Engineering, Microelectronics +16

A 32nm SoC platform technology with 2<sup>nd</sup> generation high-k/metal gate transistors optimized for ultra low power, high performance, and high density product applications

C.-H. Jan, M. Agostinelli, Markus J. Buehler et al. · 2009 · 77 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 3nm CMOS FinFlex™ Platform Technology with Enhanced Power Efficiency and Performance for Mobile SoC and High Performance Computing Applications

Shien-Yang Wu, M.C. Chiang, C.Y. Lin et al. · 2022 International Electron Devices Meeting (IEDM) · 2022 · 56 citations

Engineering, Electrical Engineering, High-performance Computing +17

A 45nm low power system-on-chip technology with dual gate (logic and I/O) high-k/metal gate strained silicon transistors

C.-H. Jan, S. Biswas, Markus J. Buehler et al. · 2008 · 45 citations

Engineering, Computer Engineering, Electrical Engineering +17