Concepedia

Author

Y. Nakahara

NEC (Japan)

Also Known As

Y. Nakahara

22

Publications

197

Citations

8

H-Index

19

Concepts

All Affiliations

NEC (Japan)
YN

About

Y. Nakahara is an author at NEC (Japan) specializing in engineering, microelectronics, and electrical engineering.

Top Concepts

#ConceptH-IndexPublicationsCitations

1

Engineering

8

8

160

2

Computer Engineering

5

5

86

3

Electrical Engineering

5

5

78

4

Applied Physics

2

2

23

5

Computer Science

1

1

18

Y. Nakahara

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8

Publications

160

Citations

8

H-Index

YearCitations

A single-chip 2.4-Gb/s CMOS optical receiver IC with low substrate cross-talk preamplifier

A. Tanabe, M. Soda, Y. Nakahara,

IEEE Journal of Solid-State Circuits

1998

51

Power-aware 65 nm node CMOS technology using variable V/sub DD/ and back-bias control with reliability consideration for back-bias mode

M. Togo, T. Fukai, Y. Nakahara,

2004

25

A redundant multivalued logic for a 10-Gb/s CMOS demultiplexer IC

A. Tanabe, Y. Nakahara, Akira Furukawa,

IEEE Journal of Solid-State Circuits

2003

18

A 65 nm-node CMOS technology with highly reliable triple gate oxide suitable for power-considered system-on-a-chip

T. Fukai, Y. Nakahara, Masayuki Terai,

2004

15

CMOS device optimization for system-on-a-chip applications

Kazuo Imai, Koji Yamaguchi, Tomoaki Kudo,

2002

15

A single chip 2.4 Gb/s CMOS optical receiver IC with low substrate crosstalk preamplifier

A. Tanabe, M. Soda, Y. Nakahara,

2002

13

Ultra-shallow in-situ-doped raised source/drain structure for sub-tenth micron CMOS

Y. Nakahara, Kiyoshi Takeuchi, T. Tatsumi,

2002

12

A cost-conscious 32nm CMOS platform technology with advanced single exposure lithography and gate-first metal gate/high-k process

Shunsuke Hasegawa, Y. Kitamura, Kazuo Takahata,

2008

11

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