Concepedia

K. Asano

KA

8

Publications

2.9K

Citations

8

H-Index

2000

Active since

Affiliations

University of California, Berkeley(Current)

Lawrence Berkeley National Laboratory

Hitachi (Japan)

K. Asano is an author at University of California, Berkeley specializing in engineering, applied physics, and nanoelectronics.

Top concepts

EngineeringApplied PhysicsNanoelectronicsMicroelectronicsElectrical EngineeringLow-power ElectronicsElectronic EngineeringMicrofabricationRoboticsKinematics

Publications per year

2000–2003

8

Publications

8

FinFET-a self-aligned double-gate MOSFET scalable to 20 nm

Chenming Hu, Jeffrey Bokor, Tsu‐Jae King et al. · IEEE Transactions on Electron Devices · 2000 · 1.6K citations

Low-power Electronics, Electrical Engineering, Gate Length +9

Sub 50-nm FinFET: PMOS

Xuejue Huang, Wen‐Chin Lee, C. Kuo et al. · 2003 · 365 citations

Low-power Electronics, Electrical Engineering, Quasi-planar Nature +11

Sub-50 nm P-channel FinFET

Xuejue Huang, Wen‐Chin Lee, C. Kuo et al. · IEEE Transactions on Electron Devices · 2001 · 280 citations

Electrical Engineering, Engineering, Nanoelectronics +10

A folded-channel MOSFET for deep-sub-tenth micron era

Digh Hisamoto, Wen‐Chin Lee, J. Kedzierski et al. · 2002 · 241 citations

Low-power Electronics, Electrical Engineering, Quasi-planar Nature +12

Ultrathin-body SOI MOSFET for deep-sub-tenth micron era

Yang‐Kyu Choi, K. Asano, N. Lindert et al. · IEEE Electron Device Letters · 2000 · 235 citations

Low-power Electronics, Ultrathin-body Soi Mosfet, Electrical Engineering +9

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