Wen‐Chin Lee

FinFET-a self-aligned double-gate MOSFET scalable to 20 nm

Chenming Hu, Jeffrey Bokor, Tsu‐Jae King et al. · IEEE Transactions on Electron Devices · 2000 · 1.6K citations

Low-power Electronics, Electrical Engineering, Gate Length +9

Sub 50-nm FinFET: PMOS

Xuejue Huang, Wen‐Chin Lee, C. Kuo et al. · 2003 · 365 citations

Low-power Electronics, Electrical Engineering, Quasi-planar Nature +11

Modeling CMOS tunneling currents through ultrathin gate oxide due to conduction- and valence-band electron and hole tunneling

Wen‐Chin Lee, Chenming Hu · IEEE Transactions on Electron Devices · 2001 · 337 citations

Device Modeling, Electrical Engineering, Engineering +14

Sub-50 nm P-channel FinFET

Xuejue Huang, Wen‐Chin Lee, C. Kuo et al. · IEEE Transactions on Electron Devices · 2001 · 280 citations

Electrical Engineering, Engineering, Nanoelectronics +10

A folded-channel MOSFET for deep-sub-tenth micron era

Digh Hisamoto, Wen‐Chin Lee, J. Kedzierski et al. · 2002 · 241 citations

Low-power Electronics, Electrical Engineering, Quasi-planar Nature +12