Wei Yip Loh

Prospect of tunneling green transistor for 0.1V CMOS

Chenming Hu, Pratik Patel, Anupama Bowonder et al. · 2010 · 112 citations

Semiconductors, Electrical Engineering, Semiconductor Device +10

Impact of interfacial layer control using Gd2O3 in HfO2 gate dielectric on GaAs

Goutam Kumar Dalapati, Yi Tong, Wei Yip Loh et al. · Applied Physics Letters · 2007 · 66 citations

Materials Science, Electrical Engineering, Semiconductor Device +12

Wide $V_{\rm fb}$ and $V_{\rm th}$ Tunability for Metal-Gated MOS Devices With HfLaO Gate Dielectrics

X.P. Wang, H.Y. Yu, M.-F. Li et al. · IEEE Electron Device Letters · 2007 · 57 citations

Wide-bandgap Semiconductor, Engineering, Integrated Circuits +16

STLM: A Sidewall TLM Structure for Accurate Extraction of Ultralow Specific Contact Resistivity

Kausik Majumdar, Saikumar Vivekanand, C. Huffman et al. · IEEE Electron Device Letters · 2013 · 23 citations

Numerical Analysis, Engineering, Sidewall Tlm +21

Charge Trapping and Breakdown Mechanism in HfAlO/TaN Gate Stack Analyzed Using Carrier Separation

Wei Yip Loh, B.J. Cho, M. S. Joo et al. · IEEE Transactions on Device and Materials Reliability · 2004 · 18 citations

Electrical Engineering, Charge Trapping, Engineering +11