Anupama Bowonder

A 14nm logic technology featuring 2<sup>nd</sup>-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 µm<sup>2</sup> SRAM cell size

S. Natarajan, M. Agostinelli, Sheikh A. Akbar et al. · 2014 · 532 citations

Engineering, Computer Engineering, Electrical Engineering +16

Si tunnel transistors with a novel silicided source and 46mV/dec swing

Kanghoon Jeon, Wei-Yip Loh, Pratik Patel et al. · 2010 · 205 citations

Engineering, Electrical Engineering, Materials Science +17

Prospect of tunneling green transistor for 0.1V CMOS

Chenming Hu, Pratik Patel, Anupama Bowonder et al. · 2010 · 112 citations

Engineering, Computer Engineering, Electrical Engineering +17

Green Transistor - A V<inf>DD</inf> Scaling Path for Future Low Power ICs

Chenming Hu, Daniel Chou, Pratik Patel et al. · Proceedings of the International Power Modulator Symposium and High Voltage Workshop/Proceedings of the ... International Power Modulator Symposium and ... High Voltage Workshop · 2008 · 55 citations

Engineering, Computer Engineering, Electrical Engineering +14

Low-voltage green transistor using ultra shallow junction and hetero-tunneling

Anupama Bowonder, Pratik Patel, Kanghoon Jeon et al. · 2008 · 33 citations

Engineering, Electrical Engineering, Materials Science +16