Y.H. Chan

Design of the Power6 Microprocessor

Joshua Friedrich, B.D. McCredie, N. James et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 2007 · 114 citations

Engineering, Vlsi Design, Computer Architecture +20

A Sub-600-mV, Fluctuation Tolerant 65-nm CMOS SRAM Array With Dynamic Cell Biasing

A.J. Bhavnagarwala, Stephen Kosonocky, C. Radens et al. · IEEE Journal of Solid-State Circuits · 2008 · 94 citations

Electrical Engineering, Engineering, Vlsi Design +12

6.6+ GHz Low Vmin, read and half select disturb-free 1.2 Mb SRAM

R. Houle, Kevin Batson, D. Rodko et al. · 2007 · 59 citations

Low-power Electronics, Electrical Engineering, Ghz Low Vmin +12

A 400-MHz S/390 microprocessor

Charles F. Webb, C.J. Anderson, L. Sigal et al. · IEEE Journal of Solid-State Circuits · 1997 · 55 citations

Hardware Security, System On Chip, Electrical Engineering +14

A transregional CMOS SRAM with single, logic V/sub DD/ and dynamic power rails

A.J. Bhavnagarwala, Stephen Kosonocky, S. P. Kowalczyk et al. · 2004 · 48 citations

Hardware Security, Low-power Electronics, Electrical Engineering +15