Stephen Kosonocky - Concepedia

Author

Stephen Kosonocky

IBM Research - Thomas J. Watson Research Center ORCID

Also Known As

Kosonocky, Stephen, S. Kosonocky, S. V. Kosonocky, S.V. Kosonocky, Stephen Kosonocky, Stephen V. Kosonocky

Publications

1.8K

Citations

H-Index

Concepts

All Affiliations

IBM Research - Thomas J. Watson Research Center IBM (United States)Advanced Micro Devices (United States)Advanced Micro Devices (Canada)Seoul National University

About

Stephen Kosonocky is an author at IBM Research - Thomas J. Watson Research Center specializing in engineering, computer engineering, and microelectronics.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	22	27	1.6K
2	Computer Engineering	22	26	1.6K
3	Computer Science	6	6	206
4	Applied Physics	3	3	326
5	Health Sciences	1	1	10

Stephen Kosonocky

Publications

1.7K

Citations

H-Index

Page 1

	Year	Citations
Optimal supply and threshold scaling for subthreshold CMOS circuits A. Wang, Anantha P. Chandrakasan, Stephen Kosonocky Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignCircuit Design	2003	191
Understanding and minimizing ground bounce during mode transition of power gating structures Suhwan Kim, Stephen Kosonocky, D.R. Knebel Low-power ElectronicsPower Gating StructuresElectrical EngineeringEngineeringPower Ic	2003	184
Fluctuation limits & amp; scaling opportunities for CMOS SRAM cells A.J. Bhavnagarwala, Stephen Kosonocky, C. Radens, Non-volatile MemoryElectrical EngineeringEngineeringVlsi DesignRetention Dc Margins	2006	158
A Sub-600-mV, Fluctuation Tolerant 65-nm CMOS SRAM Array With Dynamic Cell Biasing A.J. Bhavnagarwala, Stephen Kosonocky, C. Radens, IEEE Journal of Solid-State Circuits Electrical EngineeringEngineeringVlsi DesignEmerging Memory TechnologyApplied Physics	2008	94
A 3-Transistor DRAM Cell with Gated Diode for Enhanced Speed and Retention Time W.K. Luk, J. Cai, R.H. Dennard, Non-volatile MemoryElectrical EngineeringConventional 3TEngineeringNanoelectronics	2006	74
A Multi-Mode Power Gating Structure for Low-Voltage Deep-Submicron CMOS ICs Suhwan Kim, Stephen Kosonocky, D.R. Knebel, IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignCircuit System	2007	70
Experimental measurement of a novel power gating structure with intermediate power saving mode Suhwan Kim, Stephen Kosonocky, D.R. Knebel, EngineeringVlsi DesignEnergy EfficiencyPower Optimization (Eda)Computer Architecture	2004	69
Enchanced multi-threshold (MTCMOS) circuits using variable well bias Stephen Kosonocky, M. Immediato, P.E. Cottrell, Low-power ElectronicsElectrical EngineeringBias AuthorsEngineeringVlsi Design	2001	64
Understanding and minimizing ground bounce during mode transition of power gating structures S. Kim, Stephen Kosonocky, D.R. Knebel Low-power ElectronicsPower Gating StructuresElectrical EngineeringEngineeringPower Ic	2003	63
3.2 Zen: A next-generation high-performance ×86 core Teja Singh, Sundar Rangarajan, Deepesh John, Global FoundriesElectrical EngineeringLpp Finfet ProcessEngineeringManycore Processor	2017	61

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